z80 fixups

The last sprint (5.0) was a survey to discover how good our z80 opcode coverage, and the results were not so great, with only 86% opcode coverage. So we created a new urgent story story to fix the omissions (5.0.5) and scheduled it for immediate execution.

Implementation took a while, as there are a couple of large classes of LD, instructions that needed to be added to our already turgid LD, handler. And we needed some new syntax words too to deal with indirect loads from immediate addresses.

Code review finds some medium and low issues, nothing too serious.

We'll have a look at the changes and have the scrum master run the coverage report at the end.

assembler.asm

FOURTEEN missing opcodes were covered with this simple pattern (just a subset show here):

ADC and SBC are added and look very similar, here's ADC:

My personal fave DJNZ finally joins the party:

The implementation is trickier than you might expect, as it can handle both immediate addresses and labels, and has to deal with the undefined label case.

RST is nice and simple:

It takes a bare integer and doesn't require the # immediate constant tagging word, because RST only has that one form so there's nothing to disambiguate.

RLD and RRD are tiny:

Here's the new () syntax word to denote absolute memory addresses:

And we needed new words for (BC) and (DE) - fortunately quite simple:

One final wrinkle: we need words to represent the registers I and R, but we can't use I for this, because it's already a Forth word meaning "the current loop index". And it's used a lot for that purpose, whereas hardly anyone ever uses the I or R registers. Therefore we've taken the decision to name their words IREG and RREG:

Testing

I had Bob the scrum-master persona run the audit from 5.0 again, and this time we're at 100%. You can read the revised report on github.

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